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Explorer
Explorer
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Registered: ‎03-27-2017

AXI crossbar config for chip to chip access

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I have a master and slave chips that communicate with each other through AXI-MM. I have a series of crossbars which allow memory access from userspace to both master (grey background) and slave (lilac background) chips. 64-bit memories are used as endpoints to test reads. The addresses and address widths for each crossbar are configured as below (text indicate the settings for the crossbar whose border is the same color):

 

Screenshot from 2019-09-26 17-53-15.png

I am able to access the memories in the master chip (this indicates the addresses are correctly being decoded), but am having trouble accessing the memories in the slave chip - all accesses to the slave addresses return the same data located at 0x200000. I'm guessing there's something wrong in the way I'm configuring the crossbars in the slave chip, but not sure what!  

 

 

 

 

 

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Explorer
Explorer
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Registered: ‎03-27-2017
setting the AXI master ports to the correct # of address regions for each crossbar corrected this problem.

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Highlighted
Explorer
Explorer
299 Views
Registered: ‎03-27-2017
setting the AXI master ports to the correct # of address regions for each crossbar corrected this problem.

View solution in original post

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