06-17-2021 09:11 PM - edited 06-17-2021 09:12 PM
In the PG074, there mentioned that the init clk range from 50Mhz to 200Mhz. However, the init_clk is set to line rate/64 for Ultrascale devices and the GUI showed the linerate/64 as the maximum frequency for init_clk in Aurora 64b/66b IP. May I know is it possible if we can assign a reference input clock to init_clk that is higher than the clock frequency mentioned in the GUI?
For example, a 6.25Gbps linerate is having init_clk frequency of (6.25G/64 = 97.65625M). Is it ok if i assign 100Mhz to it instead?
06-29-2021 02:43 AM
Range of frequency which init clock can take is shown in IP GUI. Please provide clock under that limit.