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215 Views
Registered: ‎08-28-2019

How to separate clock

I want to separate a differential clock to two and connect the clocks to two modules. Is there any IP core can do that?

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2 Replies
Teacher drjohnsmith
Teacher
210 Views
Registered: ‎07-09-2009

Re: How to separate clock

nope

Im assumin gthe two modules are IP in the same FPGA ?

inside the fpga all signals are single ended,

   you use the differential IO to conveert to single ended,

What IP do you want to do this with ?

   I ask  as some IP such as the MMCM, and the SerDes blocks have very specific pins that have to connect to, to achieve best performance.

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
163 Views
Registered: ‎08-28-2019

Re: How to separate clock

I solved the problem by using a wizard to generate all clocks. Thank you so much for your reply.
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