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Explorer
Explorer
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Registered: ‎02-18-2013

How to use the ILA for AXI communication?

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I try to debug the AXI communication but I´m strugeling with the ILA. According to this post the ILA clock frequency has to be at least the double of the signal clock frequency. But I cannot change the ILA clock frequency in the block design, because this will result in an error.

Error.png

 

So how can I do it for AXI communications?

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Adventurer
Adventurer
437 Views
Registered: ‎09-13-2018
please read this topic:
https://forums.xilinx.com/t5/Adaptable-Advantage-Blog/AXI-Interface-Debug-Using-IP-Integrator/ba-p/794061

As for clock frequency can't you just use pll to double the frequency ?

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Adventurer
Adventurer
438 Views
Registered: ‎09-13-2018
please read this topic:
https://forums.xilinx.com/t5/Adaptable-Advantage-Blog/AXI-Interface-Debug-Using-IP-Integrator/ba-p/794061

As for clock frequency can't you just use pll to double the frequency ?

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Voyager
Voyager
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Registered: ‎06-28-2018

Hi @kampi 

I suggest using Set Up Debug tool (after the synthesis) to insert ILA cores. It is simpler and safer.

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Explorer
Explorer
416 Views
Registered: ‎02-18-2013

Thanks @ both of you. The link to the article was quite usefull.

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