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KrzysiekM
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Registered: ‎03-19-2021

JESD204b parallel samples

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Hi all,

I' m successfully using JESD204 IP block with ADC configured to LMFKS= 1,2,4,16,1, when rx_core_clk is equal to sample frequency and splitting of samples is easy. I receive 1 sample per ADC per rx_core_clk cycle. Then I' m sending the samples to FFT blocks.

KrzysiekM_1-1616188743934.png

 

But when I' m using ADC with JESD204B configured to LMFKS= 2,1,1,32,1, I receive 4 samples per rx_core_clk cycle. And now I have a problem. To send samples to FFT block I need 1 sample per clock cycle. What is best idea to solve this problem? Use axi-fifo with different clocks (1:4 or even 1:5)? And after FIFO try to serialize samples is good idea? Any ideas? Sampling frequency is about ~450Mhz, so My ZCU111 should handle that speed.

KrzysiekM_0-1616188700185.png

 

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drjohnsmith
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Registered: ‎07-09-2009

FIFO is the way to go 

Check out the sizes, I cant check if its still supported at the moment, but you used to be able to have different write and read widths of fifo's

    so you could write in all 4 samples at once, and read out at 4 times the rate, 

         But check what is your data rate. If the fifo is being constantly written into , then the read out will in this case be 4 times as fast, 

Is there not a way to configure the FFT block to take in multiple data samples at once ? Read up on the IP your using.

 

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drjohnsmith
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Teacher
365 Views
Registered: ‎07-09-2009

FIFO is the way to go 

Check out the sizes, I cant check if its still supported at the moment, but you used to be able to have different write and read widths of fifo's

    so you could write in all 4 samples at once, and read out at 4 times the rate, 

         But check what is your data rate. If the fifo is being constantly written into , then the read out will in this case be 4 times as fast, 

Is there not a way to configure the FFT block to take in multiple data samples at once ? Read up on the IP your using.

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>

View solution in original post

drjohnsmith
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Teacher
364 Views
Registered: ‎07-09-2009

FIFO is the way to go 

Check out the sizes, I cant check if its still supported at the moment, but you used to be able to have different write and read widths of fifo's

    so you could write in all 4 samples at once, and read out at 4 times the rate, 

         But check what is your data rate. If the fifo is being constantly written into , then the read out will in this case be 4 times as fast, 

Is there not a way to configure the FFT block to take in multiple data samples at once ? Read up on the IP your using.

 

<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
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KrzysiekM
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Registered: ‎03-19-2021

Thank You drjohnsmith. I thought that there is more handy trick to solve this. Unfortunately FFT9.1 IP block only accepts series input samples.

Also I'm thinking about getting faster clock. Is it a good idea to use asynchronous signal to refclk_jesd204? For example refclk_jesd204=124MHz comming form JESD204 IP, and faster_clock=500MHz coming from oscillator or clock generator on ZCU? I know that frequency of faster_clock must be at least 4x bigger then refclk_jesd204, but asynchronus (124MHz and 500MHz) is better then synchronus (124MHz and 496MHz)?

KrzysiekM_0-1616337548077.png

 

 

Sorry for dragging the topic.

 

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drjohnsmith
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Registered: ‎07-09-2009

Its a digital system,

    synchronous normal runs easier than asynchronous, 

cant help but think this is not going to be a new feature, feeding a JESD core into a FFT, so I can't see why its not been looked at before.

 

Ive been lucky , in that when I've used the JESD core, we were not FFT' till after we had done some down sampling of the data

    and as such the data rate was much lower.

What is your data bandwidth ?

 

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KrzysiekM
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Registered: ‎03-19-2021

Thanks, We need to analize spectrum of signal >1GHz, and we use ADC with jeds204, 2 lanes ~5Gbps each. In our project data will be reduced after FFT and some DSP operations. Anyway thank you drjohnsmith!!!

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