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avaarahoon
Contributor
Contributor
532 Views
Registered: ‎02-18-2020

no packets on m000_data_axis port of ORAN Radio IF

Hello,

We are working on the wireless-xorif design. We debugged s0_eth_axis and m000_data_axis ports. Hardware debug shows that there are no packets on m000_data_axis even if ORAN C and U plane packets received on time. The advance time matches with DU. What are the possible reasons of this problem?

The statistics of front-haul interface is something like that:

root@zcu102_om5_exs:~# xorif-app -i -c "get fhi_stats 0"
init   => status = 0
get fhi_stats 0 => status = 0
total_rx_good_pkt_cnt = 456955
total_rx_bad_pkt_cnt = 0
total_rx_bad_fcs_cnt = 0
total_rx_bit_rate = 652387904
oran_rx_bit_rate = 643084800
oran_rx_total = 456241
oran_rx_on_time = 5629
oran_rx_early = 221717
oran_rx_late = 227360
oran_rx_total_c = 15733
oran_rx_on_time_c = 2493
oran_rx_early_c = 5347
oran_rx_late_c = 7840
oran_rx_corrupt = 0
oran_rx_error_drop = 0
oran_tx_total = 0
oran_tx_total_c = 0
offset_earliest_u_pkt = 70
offset_earliest_c_pkt = 70

 

 

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6 Replies
xud
Xilinx Employee
Xilinx Employee
510 Views
Registered: ‎08-02-2007

@avaarahoon 

From the packets counter, it seems that reception window is too small, as not all the packets arrive on time, some are early and some are late. 

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xud
Xilinx Employee
Xilinx Employee
461 Views
Registered: ‎08-02-2007

@avaarahoon 

I just checked your IP GUI settings. the CONFIG.Xran_Max_Dl_Ctrl_1kWords is not enough. Buffer number is calculated by (Section per CC) (CC number) (Symbol number)/1024, and round up to a integer

Based on your GUI setting 275*1*29/1024 = 7.78,so you need to set it to 8 in IP GUI, but you set it to 5, so buffer is not enough.

For more details, please refer to page 24-29 (Memory Structure) of PG370, and check if other buffer values are large enough. 

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xud
Xilinx Employee
Xilinx Employee
425 Views
Registered: ‎08-02-2007

@avaarahoon 

Can you provide all the xorif-app commands after you boot the board?

What O-DU do you use? 

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xud
Xilinx Employee
Xilinx Employee
361 Views
Registered: ‎08-02-2007

@avaarahoon 

When I open you pcap, I notice the length of U-Plane data are not the same.

I will check if we have validated this or not.

xud_2-1620220254067.png

 

 

 

xud
Xilinx Employee
Xilinx Employee
308 Views
Registered: ‎08-02-2007

@avaarahoon 

I just realized the PRB numbers are different, so pcap should be okay.

From the get fhi_stats 0 result, following offset values are way too big. It seems the packets are not synced properly.

offset_earliest_u_pkt = 70
offset_earliest_c_pkt = 70

You probably need to re-evaluate the packet arriving time.

Can you refer to line 221 and onwards of https://github.com/Xilinx/wireless-xorif/blob/master/scripts/xil_vivado_build.tcl?  and add debug signals to ILA

Please observe how header are missed in m0_packet_in_window, we can get more hints from that.

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xud
Xilinx Employee
Xilinx Employee
221 Views
Registered: ‎08-02-2007

@avaarahoon 

I had a quick look at the file, the app_head_valid looks a bit strange.

I would expect it asserts once for every symbol

xud_1-1621335661084.png

Also can you export ILA data, so I can import it at my end, and see ILA waveform?

xud_0-1621335503386.png

 

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