All
Silicon Devices
Boards and Kits
Intellectual Property
Support
Documentation
Knowledge Base
Community Forums
Partners
Videos
Press
Applications
Products
Developers
Support
About
Account
My Account
Create Account
Sign Out
Search
All
Silicon Devices
Boards and Kits
Intellectual Property
Support
Documentation
Knowledge Base
Community Forums
Partners
Videos
Press
Search
Browse
Sign In
Help
lcapossio
Explorer
View all badges
Community Forums
:
About lcapossio
Latest posts by lcapossio
Subject
Views
Posted
Re: Problem with app creation for Petalinux 2016.4
Embedded Linux
4497
04-07-2017
03:33 AM
Re: Problem with app creation for Petalinux 2016.4
Embedded Linux
4545
04-05-2017
08:14 PM
Problem with app creation for Petalinux 2016.4
Embedded Linux
4619
04-04-2017
05:29 AM
Re: Force BRAM to use dual ports in the same cycle
High-Level Synthesis (HLS)
5246
12-01-2016
04:29 PM
Re: Reset dependency between DDR4 interfaces
Memory Interfaces and NoC
8166
12-09-2015
09:32 AM
View All ≫
My Accepted Solutions
Subject
Views
Posted
Re: Spartan 6 PLL doesn't lock on Post-Synthesis S...
Simulation and Verification
6179
07-29-2013
08:59 AM
View All ≫
Community Stats
Posts
111
Solutions
3
Kudos Given
18
Kudos Received
5
Member Since
10-19-2012
Contact Me
Online Status
Offline
Date Last Visited
08-04-2019
05:35 AM
Kudos from
Member
Kudos
anna.raikin@fid
us.com
1
diverger
2
vittalniddodi.k
amath@utdallas.
edu
1
driesd
1
View All ≫
Kudos given to
Member
Kudos
tolga.sel
1
avrumw
3
athandr
2
muzaffer
1
yenigal
1
View All ≫
Latest Tags
Vivado
chipscope
DDR3
ILA
Kintex 7
kintex7
mig
Shift Register
synthesis
VHDL
vio
View All ≫
