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daniel.cogan
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About daniel.cogan
Latest posts by daniel.cogan
Subject
Views
Posted
Re: Undefined function
High-Level Synthesis (HLS)
53
09-18-2020
10:50 AM
Re: Undefined function
High-Level Synthesis (HLS)
64
09-18-2020
09:12 AM
Undefined function
High-Level Synthesis (HLS)
112
09-17-2020
06:08 AM
Re: Treat input vectors like registers instead of ...
High-Level Synthesis (HLS)
195
08-12-2020
09:18 AM
Re: Treat input vectors like registers instead of ...
High-Level Synthesis (HLS)
228
08-12-2020
07:20 AM
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My Accepted Solutions
Subject
Views
Posted
Re: LUTs per SLR
Versal and UltraScale Architecture™
331
08-21-2019
10:29 AM
Re: Why didn't external VREF work?
Other FPGA Architecture
8848
01-12-2017
10:36 AM
Re: lpddr2 example design doesn't calibrate
Other FPGA Architecture
6983
01-09-2017
04:48 PM
Re: multiport lpddr2 on Artix-7
Memory Interfaces and NoC
10764
11-04-2013
01:53 PM
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Community Statistics
Posts
99
Solutions
4
Kudos given
17
Kudos received
6
Member Since
07-30-2013
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Online Status
Offline
Date Last Visited
09-18-2020
02:16 PM
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