Solutions
Products
Support
Solutions
Products
Support
Solutions
Products
Support
Solutions
Products
Support
Solutions
Products
Support
Account
My Account
Create Account
Sign Out
Search
All
Silicon Devices
Boards and Kits
Intellectual Property
Support
Documentation
Knowledge Base
Community Forums
Partners
Videos
Press
Search
Browse
Sign In
Help
jpathiku
Visitor
View all badges
Community Forums
:
About jpathiku
Latest posts by jpathiku
Subject
Views
Posted
Re: grouping IDELAYCTRL and ODELAYE3 spread out in...
Other FPGA Architecture
320
10-26-2019
01:29 PM
grouping IDELAYCTRL and ODELAYE3 spread out in mul...
Other FPGA Architecture
389
10-24-2019
09:06 PM
Re: is VCCO_65 essential for Ultrascale+ in Slave ...
FPGA Configuration
493
12-03-2018
04:24 PM
is VCCO_65 essential for Ultrascale+ in Slave Seri...
FPGA Configuration
588
11-25-2018
09:27 PM
7 Series IBERT GTP (3.0) for Artix xc7a35tcsg325 p...
Other FPGA Architecture
4302
11-11-2014
06:49 PM
View All ≫
My Accepted Solutions
Subject
Views
Posted
Re: grouping IDELAYCTRL and ODELAYE3 spread out in...
Other FPGA Architecture
320
10-26-2019
01:29 PM
Re: Zynq PL configuration in a DDRLess system
Processor System Design and AXI
3390
05-31-2014
02:18 AM
View All ≫
Community Statistics
Posts
8
Solutions
2
Kudos given
0
Kudos received
2
Member Since
10-13-2007
Contact Me
Online Status
Offline
Date Last Visited
10-26-2019
04:50 PM
Kudos from
Member
Kudos
markg@prosensin
g.com
2
View All ≫
Latest Tags
No tags yet
