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timduffy
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About timduffy
Latest posts by timduffy
Subject
Views
Posted
Re: Custom MPSoC design with TUSB7340 xHCI host pr...
Embedded Linux
1262
02-14-2018
08:22 AM
Re: Custom MPSoC design with TUSB7340 xHCI host pr...
Embedded Linux
1273
02-13-2018
10:12 AM
Re: DDR3 KC705 at 200 MHz with 64 bit bus
Memory Interfaces and NoC
2389
08-10-2017
05:15 AM
Re: AXI4-Stream Interconnect - Disable TSTRB
Versal and UltraScale Architecture™
3350
08-10-2017
05:13 AM
Re: Xilinx Vivado 2017.1 Constant block getting re...
Implementation
2717
08-10-2017
05:00 AM
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My Accepted Solutions
Subject
Views
Posted
Re: Simulation of a MicroBlaze data write to DDR4 ...
Memory Interfaces and NoC
4737
08-03-2017
09:53 AM
Re: DRC Error on DSP48E1 Slice's CEA (Clock Enable...
Other FPGA Architecture
6504
08-03-2017
09:47 AM
Re: ISIM array size limitation
Simulation and Verification
3456
08-03-2017
06:48 AM
Re: Multiple DDR3 Controller For Enhancing Bandwid...
Memory Interfaces and NoC
6674
08-03-2017
06:40 AM
Re: Deleting Xilinx Download folder
Installation and Licensing
7305
08-02-2017
10:36 AM
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Community Stats
Posts
154
Solutions
14
Kudos Given
40
Kudos Received
29
Member Since
04-05-2016
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Date Last Visited
08-30-2019
11:18 AM
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